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## OBJECTIVE:

• To introduce the fundamental tools for style with combinatory and ordered digital logic
and state machines.
• to find out straightforward digital circuits in preparation for pc engineering.

### UNIT- I:

Digital Systems and Binary Numbers
Digital Systems, Binary Numbers, Binary Numbers, positional notation and hex Numbers,
Complements of Numbers, enhances of Numbers, Signed Binary Numbers,Arithmetic
addition and subtraction

### UNIT -II:

thought of mathematical logic
Basic Theorems and Properties of mathematical logic, Boolean Functions, Canonical and commonplace
Forms, Minterms and Maxterms,

### UNIT- III:

Gate level decrease
Map Method, Two-Variable K-Map, Three-Variable K-Map, Four Variable K-Maps. merchandise of
Sum Simplification, total of merchandise Simplification, Don’t – Care Conditions, NAND and NOR
Implementation, Exclusive‐OR perform

### UNIT- IV:

Combinational Logic
Introduction, Analysis Procedure, style Procedure, Binary Adder–Subtractor, Decimal Adder,
Binary multiplier factor, Decoders, Encoders, Multiplexers, lipoprotein Models of combinatory Circuits

### UNIT- V:

Synchronous ordered Logic
Introduction to ordered Circuits, Storage Elements: Latches, Storage Elements: Flip‐Flops,
Analysis of Clocked ordered Circuits, coarse and Moore Models of Finite State Machines

### UNIT -VI:

Registers and Counters
Registers, Shift Registers, Ripple Counters, Synchronous Counters, Ring Counter, Johnson
Counter, Ripple Counter

II Year – I Semester
L T P C
4 0 0 3

### OUTCOMES:

A student WHO with success fulfills the course necessities can have demonstrated:
• a capability to outline completely different variety systems, binary addition and subtraction, 2’s
complement illustration and operations with this illustration.
• a capability to know the various switch pure mathematics theorems and apply them for
logic functions.
• a capability to outline the Karnaugh map for some variables associate degreed perform an recursive
reduction of logic functions.
• a capability to outline the opposite decrease strategies for any variety of variables
Variable Entered Mapping (VEM) and Quine-MeCluskey (QM) Techniques and perform
an recursive reduction of logic functions.

### TEXT BOOKS:

1. Digital style, 5/e, M.Morris Mano, archangel D Ciletti, PEA.
2. Fundamentals of Logic style, 5/e, Roth, Cengage.
REFERENCE BOOKS:
3. Digital Logic and pc style, M.Morris Mano, PEA.
4. Digital Logic style, Leach, Malvino, Saha, TMH.
5. fashionable Digital physical science, R.P. Jain, TMH.