Switching Theory and Logic Design
UNIT – I:
REVIEW OF variety SYSTEMS & CODES: i) illustration of numbers of various base, speech from one base to a different base, r-1’s compliments and r’s compliments of signed members, downside resolution. ii) four bit codes, BCD, Excess-3, 2421, 84-2-1 9’s compliment code etc., iii) Logic operations and error detection & correction codes; Basic logic operations -NOT, OR, AND, Universal building blocks, EX-OR, EX-NOR – Gates, normal SOP and POS, Forms, Gray code, error detection, error correction codes (parity checking, even parity, odd parity, overacting code) NAND-NAND and NOR-NOR realizations.
UNIT – II:
diminution TECHNIQUES mathematician theorems, principle of complementation & duality, De-morgan theorems, diminution of logic functions mistreatment mathematician theorems, diminution of change functions mistreatment K-Map up to six variables, tabular diminution, downside resolution (code-converters mistreatment K-Map etc..).
UNIT – III:
combinable LOGIC CIRCUITS style style of 0.5 adder, full adder, 0.5 subtractor, full subtractor, applications of full adders, 4-bit binary subtractor, adder-subtractor circuit, BCD adder circuit, Excess three adder circuit, look-a-head adder circuit, style of decoder, demultiplexer, seven section decoder, higher order demultiplexing, encoder, electronic device, higher order multiplexing, realization of mathematician functions mistreatment decoders and multiplexers, priority encoder, 4-bit digital comparator.
UNIT – IV:
INTRODUCTION OF PLD’s promenade, PAL, PLA-Basics structures, realization of mathematician operate with PLDs, programming tables of PLDs, deserves & demerits of promenade, PAL, PLA comparison, realization of mathematician functions mistreatment promenade, PAL, PLA, programming tables of promenade, PAL, PLA.
UNIT – V:
sequent CIRCUITS I Classification of sequent circuits (synchronous and asynchronous); basic flip-flops, truth tables and excitation tables (nand RS latch, nor RS latch, RS flip-flop, JK flip-flop, T flip-flop, D flip-flop with reset and clear terminals). Conversion from one flip-flop to flip-flop. style of ripple counters, style of synchronous counters, Johnson counter, ring counter. style of registers – Buffer register, management buffer register, register, bi-directional register, universal register.
UNIT – VI:
sequent CIRCUITS II Finite state machine; Analysis of clocked sequent circuits, state diagrams, state tables, reduction of state tables and state assignment, style procedures. Realization of circuits mistreatment varied flip-flops. Meelay to Moore conversion and vice-versa.
II Year – I Semester
L T P C
4 0 0 3
SWITCHING THEORY AND LOGIC style
one. change Theory and Logic style by Hill and Peterson Mc-Graw Hill TMH edition.
2. change Theory and Logic style by A. Anand Kumar three. Digital style by Mano letter.
one. trendy Digital physical science by RP Jain, TMH
2. Fundamentals of Logic style by Charles H. Roth Jr, Jaico Publishers three. small physical science by Milliman MH edition.